Waaah... what a mouthful... So this is what happened. I've got this lovely audio test set, Lindos LA100. It consists of an audio oscillator LA101 and a measurement set LA102. Since this set is over 20 years old the SED1503-based display of the LA102 got bad and lost pixels. Highly annoying. Lindos still supports these devices and offers replacement displays for a cool GBP 125. So I searched around and found an alternative from Vetco Electronics, over stateside. Fearing a lengthy hassle with customs after the USPS tracking site remained mum about the weareabouts I was surprised that the bubble envelope turned up after only (!) three weeks.
Now the original display has LED backlighting making it rather bulky. The Epson replacement display uses an electroluminescent sheet, making it much thinner. Only snag is that the backlight needs an AC voltage of about 200 Vpp at around 500 Hz. And of course there was no inverter included. Another internet search gave a solution: Sipex makes a beautiful little chip (SP4427) that creates this voltage from a single 1.5 V battery. It gets hopeless: no one sells this chip in single unit quantities. So I decided to hone my programming skills and dive into my junk box.
Since I have quite a few ready I decided to use a PIC16F628A. With that many ports a bit overkill, I only need five: the drive for the boost converter FET, two for the output voltage regulation feedback and two for the EL output stage. See the schematic. The boost converter is built with a MOSFET from my junk box, anything with a drain voltage of 200 V or greater and a not too large input capacitance (few hundred pF max) should work. The output stage uses two video transistors (BF422) in a configuration to present a low impedance path to the input capacitance of the EL sheet. Without the second, upper transistor (totem pole) the collector resistor is too large to get to the rail voltage quickly and only rises to 20 volts or so. The rail voltage of around 100 V is regulated via a feedback voltage divider that is set to around 2.50 V with the PIC's internal voltage reference. The schmitt-trigger like action prevents the circuit to become instable. The resulting ripple is not noticable in the backlight. The unregulated 10 V supply voltage is taken directly from the power supply of the Lindos.
The code (assembly) is straightforward: declarations, interrupt handlers for the two timers, initialization, set up interrupts, Timer0 and Timer1 and the voltage reference VREF. The Drive section handles the output stage and also contains the code for the feedback loop of the output voltage. When the circuit starts, the output voltage rises. First the upper voltage COMPHI is reached and a flag (PKD - peaked) is set to remove the drive from the boost converter FET. Once the lover threshold COMPLO is reached the drive is switched back on. The EL drive is alternating toggled with 250 Hz (4 ms). And that's pretty much it. Works like a charm:
But I should have used a bigger board:
Edit: Turns out that the drive for the FET was suboptimal. The high voltage dropped significantly. Also the switching frequency of the EL backlight was too low. Raising it loaded the HV even worse. Time to fix the code. First the drive for the FET is redone. The PIC has this feature called PWM output that I should have used from the start. By varying the duty cycle between 10 and 85 % the high voltage can be regulated. With a test jig I determined the optimal drive frequency for the display. This is about 1.5 kHz but I left it at 1.0 kHz as the power increased quite a bit. For good measure enabled the watchdog timer.
The result is a complete fix. The only thing is the ripple on the HV but I can live with that. The code does a good job keeping the voltage constant. Its action can be clearly seen with a scope:
The left image shows the HV ripple and the PWM drive for the FET. The reversal of the EL backlight can be clearly seen, and as the voltage is sampled at the same time the backlight is reversed the HV changes accordingly. The two right images are a magnification (50 µs/div) at reversal. While the voltage rises a few times the backlight is reversed until the voltage peaks and the "PKD" bit is set. Then it starts dropping until there's another reversal pulling the voltage below the lower comparator threshold. The only thing that could be improved is the HV electrolytic capacitor. A film capacitor in parallel should reduce the spikes. But there's no space for it...
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Last Update: 29June 2013
This software is licensed under the CC-GNU GPL.